Trio Adiono, ST., MT., Ph.D

Associate Professor

Ph.D: Tokyo Institute of Technology, Japan _________________________________

School of Electrical Engineering and Informatics
Institut Teknologi Bandung
Achmad Bakrie Building-Jl. Ganesa No. 10 Bandung,
Indonesia 40132

Phone +62 22 2502260
IP Phone: +62 22 4254028, Fax: +62 22 253 4222
Email: tadiono@stei.itb.ac.id


Education

Field of Expertise

Wireless Communication DSP, FPGA, and Smart Card

 

1994-2015

 

Publications

Journals:

2012

•  R. V. W. Putra, R. Mareta, N. Anbarsanti, T. Adiono , " A New RTL Design Approach for a DCT/IDCT-Based Image Compression Architecture Using the mCBE Algorithm ", ITB J. ICT, Vol. 6, No. 2, 2012, 131-150.

2010

•  S. Galih, T. Adiono , A. Kurniawan “ Low Complexity MMSE Channel Estimation by Weight Matrix Elements Sampling for Downlink OFDMA Mobile WiMAX System ”, IJCSNS International Journal of Computer Science and Network Security , February 2010.

2009

•  T. Adiono , H. G. Kerkhoff, H. Kunieda, “ An Infrastructural IP for Interactive MPEG-4 SoC Functional Verification ”, ITB J. ICT Vol. 3, No. 1, 2009, 51-66.

•  S. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono , A. Kurniawan, “ A Comparative Study of Channel Estimation Based on Symbol Source of Pilot for Downlink OFDMA System on IEEE 802.16e Standard ”, Jurnal Penelitian dan Pengembangan telekomunikasi (JurTel IT Telkom) Vol. 14 no. 1 Juni 2009.

•  C. Honsawek, K. Ito, T. Ohtsuka, T. Isshiki, D. Li, T. Adiono , H. Kunieda, " System-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Application ," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences . Vol.E84-A No.11, pp.2614-2622.

2002

•  T. Adiono , T. Isshiki, K. Ito, D. Li, C. Honsawek, H. Kunieda., " New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec ," IEICE Trans. Fundamentals, VOL.E85-A, No.6 June 2002 . pp.1396-1407 .

 

Conference Papers

2015

•  A. Purwita, T. Adiono , " Experimental Evaluation for Relaying System Allowing Intralink Error ", International ITG Conference Systems, Communication and Coding, Hamburg, Germany, February 2-5, 2015.

2014

•  A. Sumarudin, T. Adiono, W. P. Putra, "Flexible and Reconfigurable System on Chip for Wireless Sensor Network",  International Conference on Information Technology System and Innovation, November 26, 2014, Bali, Indonesia.

•  A. Z. Ramdhani, M. Rois, T. Adiono , "A Real time AMBA Based Audio Coprocessor for System-on-Chip", International Conference on Electrical Engineering and Computer Science, November 24-25, 2014, Bali, Indonesia.

•  M. H. Santriaji, H. Mauludin, D. Surgawiwaha, T. Adiono . “ Real-time Implementation of Maximum a Posteriori (MAP) Based Noise Reductions Using Leon 3 System on Chip”, The International Conference on Electrical Engineering and Computer Science, 24-25 November 2014, Bali, Indonesia.

•  T. Adiono , " Challenges and Opportunities in Designing Internet of Things ", The 1 st International Conference on Information Technology, Computer and Electrical Engineering (ICITACEE 2014) , Semarang, Indonesia, November 7-8, 2014, Keynote Speaker, ISBN 978-1-4799-6431-4.

•  Hafizh, A. Ferry, T. Adiono , " Real-time SoC Architecture and Implementation of Variable Speech PDF based Noise Cancellation System ", The 1 st International Conference on Information Technology, Computer and Electrical Engineering (ICITACEE 2014) , Semarang, Indonesia, November 7-8, 2014, Keynote Speaker, ISBN 978-1-4799-6431-4.

•  P. Wibawa, Bama, I M. W. Nungrat, T. Adiono , " Fully Integrated RF Power Harvester Module for NFC Contact-less SmartCard ", The Joint Conference 4S-2014/AVIC 2014, Ho Chi Minh, Vietnam, October 21-24, 2014.

•  A. Silitonga, T. Adiono, I. Wicaksono, " Concept Implementation of Sole Module for Software-based UL Subframe Mapping Method on TDD WiMAX IEEE 802.16e ", The 2014 International Conference on Computer, Control, Informatics and Its Applications, 21-23 October 2014, Bandung, Indonesia. ISBN : 978-1-4799-4576-4.

•  R. V. W. Putra, T. Adiono , " A Register-Free and Homogenous Architecture for Square Root Algorithm ", The 2014 International Conference on Computer, Control, Informatics and Its Applications, 21-23 October 2014, Bandung, Indonesia, Pages 70-74 , ISBN : 978-1-4799-4576-4 .

•  R. V. W. Putra, T. Adiono , " A Configurable and Low Complexity Hard-Decision Viterbi Decoder in VLSI Architecture ", The 2 nd International Conference on Information and Communication Technology 2014”, 28-29 May 2014, Bandung, Indonesia.

•  P. Wibawa, Bama, I M. W. Nungrat, T. Adiono , " Fully Integrated RF Power Harvester Module for NFC Contact-less SmartCard ", The Joint Conference 4S-2014/AVIC 2014, Ho Chi Minh, Vietnam, October 21-24, 2014 , Page 87-92.

2013

•  T. Adiono , A. A. Purwita, R. Haryadi, R. Mareta, and E. R. Priandana, " A Hardware-Software Co-Design For A Real-Time Spectral Subtraction Based Noise Cancellation System ", 2013 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2013) , Okinawa, Japan, November 12-15, 2013, ISBN: 978-1-4673-6360-0.

•  T. Adiono , N. Sutisna, " Architecture Design Framework for Flexible and Configurable WiMAX OFDMA Baseband Transceiver ", 2013 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2013) , Okinawa, Japan, November 12-15, 2013 , Pages 656-661, ISBN: 978-1-4673-6360-0.

•  M. F. Kasim, T. Adiono , M. Fahreza, M. F. Zakiy, " Real-time Architecture and FPGA Implementation of Adaptive General Spectral Substraction Method ", The 4 th International Conference on Electrical Engineering and Informatics, Malaysia, June 24 - 25, 2013, Procedia Technology Volume 11, 2013, Pages 191–198.

•  M. F. Kasim, T. Adiono , M. Fahreza, M. F. Zakiy, " FPGA Implementation of Fixed-Point Divider Using Pre-Computed Values ", The 4 th International Conference on Electrical Engineering and Informatics, June 24 - 25, 2013, Malaysia, Procedia Technology Volume 11, 2013, Pages 206–211.

•  Firdauzi, K. Wirianto, M. Arijal, T. Adiono , " Design and Implementation of Real Time Noise Cancellation System Based on Spectral Subtraction Method ", The 4 th International Conference on Electrical Engineering and Informatics, June 24 - 25, 2013, Malaysia, Procedia Technology Volume 11, 2013, Pages 1003–1010.

•  T. Adiono , N. Sutisna , " Architecture Design of Frequency Domain Processing for Flexible and Re-configurable WiMAX OFDMA Receiver ", The 4 th International Conference on Electrical Engineering and Informatics, June 24 - 25, 2013, Malaysia, Procedia Technology Volume 11, 2013, Pages 680–688.

•  N. Sutisna, T. Adiono , " Hardware-Software Design Partitioning for Flexible and Re-configurable WiMAX OFDMA Physical Layer ", The Proceeding of 2013 International Conference on Electronics, Information and Communication (ICEIC 2013), Bali, Indonesia, January 30 – February 2, 2013.

•  Mitayani, T. Adiono , " Timing Synchronization in Downlink LTE 3GPP Synchronization ", The Proceeding of 2013 International Conference on Electronics, Information and Communication (ICEIC 2013), Bali, Indonesia, January 30 – February 2, 2013.

•  T. Adiono , R. N Susanti, " Low Complexity Adaptive Beamforming Power Control with Scheduling Transmit in Wimax ", The Proceeding of 2013 International Conference on Electronics, Information and Communication (ICEIC 2013), Bali, Indonesia, January 30 – February 2, 2013.

 

2012

•  F. Dwiyasa, R. Karlina, T. Adiono , " Algorithm and Hardware Architecture of High Accuracy IQ Imbalance Estimation and Compensation for OFDM System ", Proceedings of 2012 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2012), Tamsui, New Taipei City, November 4-7, 2012, ISBN 978-1-4673-5083-9, Pages 669-673.

•  T. Adiono , Marvin, " Radix-4 Max-log-MAP Parallel Turbo Decoder Architecture with a New Cache Memory Data Flow for LTE ", Proceedings of 2012 IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2012), Tamsui, New Taipei City, November 4-7, 2012, ISBN 978-1-4673-5083-9, Pages 792 - 797 .

•  Mitayani, T. Adiono , " Synchronizer Design for Downlink Receiver 3GPP LTE ", Proceedings of the 1 st International Workshop on Industrial IT Convergence, Bandung, Indonesia, August 28-29, 2012.

•  W. A. Cahyadi, T. Adiono , A. H. Salman, Y. Kurniawan, " The SoC Design And FPGA Implementation Of Digital TV Receiver ", The 1 st International Workshop on Industrial IT Convergence, Bandung, Indonesia, August 28-29, 2012.

•  B. Humala, I. Abdurrahman, G. Ellhasya, T. Adiono , " A Configurable FFT with SPDSR Architecture and 1/8 Twiddle Factor Memory Optimization ", The 1 st International Workshop on Industrial IT Convergence, Bandung, Indonesia August 28-29, 2012.

•  T. Adiono , K. Adityowibowo, " Design and Real-time Implementation of Layer 3 Ethernet Bridge on Point-to-Point WiMAX ", TSSA, Bali, Indonesia, 2012, ISBN 978-1-4673-4549-1, Pages 1-3.

•  H. Salman, T. Adiono , W. A. Cahyadi, Y. Kurniawan, " SoC Design and FPGA Implementation of Digital TV Receiver ", TSSA, Bali, Indonesia, 2012, ISBN 978-1-4673-4549-1, Pages 125-129.

•  A. Purwita, T. Adiono , " A Four Quadrants Parallel-Recursive 2-D DCT/IDCT VLSI Architecture ", The 5 th International Conference on Emerging Trends in Engineering & Technology (ICETET-12), Himeji-Japan, November 5-7, 2012, ISBN 978-1-4799-0276-7, Pages 233-238.

•  R. Ferdian, K. Anwar, T. Adiono , " Efficient Equalization Hardware Architecture for SC-FDMA Systems without Cyclic Prefix ", The 12 th IEEE International Symposium on Communications and Information Technologies (ISCIT 2012), October 2-5, 2012, Gold Coast-Australia, ISBN: 978-1-4673-1157-1, Pages 936-941.

•  T. Adiono , R. Mareta " Low Latency Parallel-Pipelined Configurable FFT-IFFT 128/256/512/1024/2048 for LTE ", Intelligent and Advanced System (ICIAS 2012), Kuala Lumpur, Malaysia, June 12-14, 2012, ISBN 978-1-4577-1968-4, Pages 768-773.

•  R. V. Wicaksana, T. Adiono . " Reconfiguration of OpenSPARC TI 8-Cores Processor to Low-Cost Single-Core Processor ", SITIA 2012, ITS, Surabaya, Indonesia, 2012.

2011

•  T. Adiono , F. Dwiyasa, N. Sutisna, H. Achmad, E. Soryawan, F. Dawani, R. Ferdian, “ Real-Time WiMAX System on Chip Design, Implementation and Field Test ”, IEEJ International Analog VLSI Workshop 2011, Bali, Indonesia, November 2-4, 2011.

•  N. Sutisna, T. Adiono , “ Optimum VLSI Architecture of High Performance Synchronizer for WiMAX OFDMA System ”, IEEJ International Analog VLSI Workshop 2011, Bali, Indonesia, November 2-4, 2011.

•  A. Purwita, T. Adiono , " An Optimized 8-Level Turbo Decoder Algorithm and VLSI Architecture for LTE ”, IEEJ International Analog VLSI Workshop 2011, Bali, Indonesia, November 2-4, 2011.

•  Pradini, T. M. Roffi, R. Dirza, T. Adiono , " VLSI Design of a High-Throughput Discrete Cosine Transform for Image Compression Systems ", 2011 International Conference on Electrical Engineering and Informatics, Bandung, Indonesia, July 17-19, 2011, ISBN 978-1-4577-0753-7, Pages 1-6.

•  A. Purwita, A. Setio, T. Adiono , " Optimized 8-Level Turbo Encoder Algorithm and VLSI Architecture for LTE ", 2011 International Conference on Electrical Engineering and Informatics, Bandung, Indonesia, July 17-19, 2011, ISBN 978-1-4577-0753-7, Pages 1-6.

•  R. V. W. Putra, R. Mareta, N. Anbarsanti, T. Adiono , " The Efficient mCBE Algorithm and Quantization Numbers for Multiplierless and Low Complexity DCT/IDCT Image Compression Architecture ", The 2011 International Conference on Electrical Engineering and Informatics, Bandung, Indonesia, July 17-19, 2011, ISBN 978-1-4577-0753-7.

•  S. Galih, T. Adiono , “ Folding Memory Shared Processor Array (FMSPA) Architecture for Channel Estimation of Downlink OFDMA IEEE 802.16e System ”, The 6 th International Symposium on Parallel Computing in Electrical Engineering (PARELEC 2011), Luton, UK, April 3-7, 2011, ISBN 978-1-4577-0078-1, Pages 173-178.

2010

•  T. Adiono , A. Prasetiadi, A. Salbiyono, " Efficient Encoding for Hardware Implementation of IRA LDPC on 802.16 Standard ", International Symposium on Intelligent Signal Processing and Communications Systems, Chengdu, China, December 6-8, 2010, ISBN 978-1-4244-7369-4.

•  A. Salbiyono, T. Adiono , " LDPC Decoder Performance under Different Number of Iterations in Mobile WiMAX ", International Symposium on Intelligent Signal Processing and Communications Systems, Chengdu, China, December 6-8, 2010, ISBN 978-1-4244-7369-4.

•  R. Mulyawan, F. Nugroho, R. Novi, F. Dwiyasa, T. Adiono , "Performance Analysis of LLR Combining HARQ for MIMO Systems in Mobile WiMAX", Chengdu, China, December 6-8, 2010, ISBN 978-1-4244-7369-4.

•  Firdaus, I. Prayudi, R.H. Widyalaksono, T. Adiono , " A High Speed MIPS Processor Architecture with Minimum Flush Rate and Zero Stall ", 3 rd AUN/SEED-NET Regional Conference in Electrical and Electronics Engineering: International Conference on System on Chip Design Challenges (ICoSoC 2010). pp. 96-100, Manila, Philippine, September 8-9, 2010.

•  H. Kristian, H. Wahyono, K. Rizki, T. Adiono , " Ultra-Fast-Scalable BCH Decoder With Efficient-Extended Fast Chien Search ," 3 rd IEEE International Conference on Computer Science and Information Technology (ICCSIT) 2010, vol.4, no., Chengdu, July 9-11, 2010 , ISBN 978-1-4244-5537-9, Pages. 338-343.

•  N. Ahmadi, M. H. Sirojuddin, A.D. Nandaviri, T. Adiono , "An Optimal Architecture of BCH Decoder," Application of Information and Communication Technologies (AICT), Tashken, October 12-14, 2010, ISBN 978-1-4244-6903-1.

2009

•  T. Adiono , A. Fourman D.A.S, A. H. Salman , “ Configurable 2k/4k/8k FFT-IFFT Core for DVB - T and DVB-H ”, The 11 th Industrial Electronic Seminar 2009 (IES 2009), Surabaya, Indonesia, October 21, 2009.

•  A. Salbiyono, R. Purba, R. Mulyawan, A. Wahyu, M. Yusuf, T. Adiono , “ CTC Decoder for Mobile WiMAX with HARQ Support ”, The 5 th International Conference TSSA 2009, Bandung, Indonesia, November 20-21, 2009.

•  A. Salbiyono, R. Purba, R. Mulyawan, A. Wahyu, M. Yusuf, T. Adiono , " Double Binary Convolutional Turbo Decoder for DVB RCS ", The 5 th International Conference TSSA 2009, Bandung, Indonesia, November 20-21, 2009.

•  T. Adiono , “ VLSI Education In Institut Teknologi Bandung Indonesia ”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 579-582.

•  Tyson , A. L. Romas , S. Intan , T. Adiono , “ A Pipelined Double-Issue MIPS Based Processor Architecture ”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 583-586.

•  S. Galih, R. Karlina, A. Irawan, T. Adiono , A. Kurniawan, Iskandar, " Low Complexity Partial Sampled MMSE Channel Estimation for D ownlink OFDMA IEEE 802.16e System ", 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 162-166.

•  A. Salbiyono, T. Adiono , " Preamble Structure-Based Timing Synchronization for IEEE 802.16e ”, 2009 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2009), Kanazawa, Japan, December 7-9, 2009, ISBN 978-1-4244-5015-2, Pages 319-322.

•  S. Galih, R. Karlina, A. Irawan, T. Adiono , A. Kurniawan, " Low Complexity Down-Sampled MMSE (DMMSE) Channel Estimation for Downlink OFDMA IEEE 802.16e System ", The 3 rd IEEE International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications, Beijing, China, October 27-29, 2009, ISBN 978-1-4244-4076-4, Pages 273-277.

•  S. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono , A. Kurniawan, " High Mobility Data Symbol Based Channel Estimation for Downlink OFDMA System Based on IEEE 802.16e Standard ", IEEE International Symposium on Communication and Information Technology(ISCIT) 2009, Incheon, Korea , September 28-30, 2009, ISBN 978-1-4244-4521-9, Pages 859-863 .

•  S. Galih., R. Karlina, F. Nugroho, A. Irawan. T. Adiono , A. Kurniawan , ” Hight Mobility Data Pilot based Channel Estimation for Downlink OFDMA System based on IEEE 802.16e Standard ” , 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 478-483.

•  Heri K., A. B. Nugraha, R. S. Purba, T. Adiono , ” Very Fast Pipelined RSA Architecture Based on Montgomery's Algorithm ” , 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 491-495.

•  T. Adiono , W. A. Cahyadi, A. H. Salman, " DVB-T Synchronizer Architecture Design and Implementation " , 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 594-599.

•  T. Adiono , R. S. Purba , " Scalable Pipelined CORDIC Architecture Design for Inverse-CABAC on H.26 4 " , 2009 International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2 .

•  T. Adiono , A. Maria K., A. H. Salman. “ VLSI Architecture Design for Inverse-CABAC on H.264 Decoder ” , International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2 , Pages 650-653 .

•  T. Adiono , M. Syafiq, Y. S. Hidayat, A. Irawan, “ 64-point Fast Efficient FFT Architecture Using Radix-23 Single Path Delay Feedback ” , International Confer e nce on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 654-658 .

•  M. Zulkifli, Y.P. Yudhanto, N. A. Soetharyo, T. Adiono . " Reduced Stall MIPS Architecture using Pre-Fetching Accelerator ” , International Conference on Electrical Engineering and Information, Selangor, Malaysia, August 5-7, 2009, ISBN 978-1-4244-4913-2, Pages 611-616.

•  T. Adiono , Andjas W., A. R. Novie , “ The Future Trend of MIMO Technology in WiMAX ” ., The First International Workshop on Modern Research Methods in Electrical Engineering IWoRMEE 2009 , Hasanuddin University, Makasar , Indonesia, August 3-6, 2009.

•  T. Adiono , “ Chipset as Local ICT Industry Enabler ” , e-Indonesian Initiative V, Bandung Institute of Technology, Indonesia, June 24-25, 2009.

•  S. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono , A. Kurniawan, " High Mobility Data Pilot Based Channel Estimation for Downlink OFDMA System Based on IEEE 802.16e Standard ", ICROS-SiCE International Joint Conference 2009, Fukuoka, Japan, August 18-21,2009.

•  S. Galih, R. Karlina, F. Nugroho, A. Irawan, T. Adiono , A. Kurniawan , " A Comparative Study of Interpolation Methods for Channel Estimation Based on Downlink OFDMA IEEE 802.16e Standard ", International Conference on Rural Information and Communication Technology (RICT), Bandung, Indonesia, 2009.

 

2007

•  T. Adiono , F. Dwiyasa, R. Karlina, Irma, A. Irawan, A. Hamidah, “ Hardware Modeling of WIMAX Base Band Chip ”, International Conference on Rural Information and Communication Technology 2007, (ICT ITB), ISBN : 978-979-15509-I-8.

•  T. Adiono , A. Mulyanto, A. Sutanto, " H.264/MPEG-AVC Video Decoder Architecture Design for IPTV ", International Conference on Rural Information and Communication Technology 2007, (ICT, ITB), ISBN : 978-979-15509-I-8.

•  H. Setiawan, T. Adiono, A. Kurniawan, " Perancangan Pembangkit Kode OVSF untuk Standard Komunikasi Downlink WCDMA ", Seminar Nasional Teknologi Informasi, Universitas Tarumanegara, Jakarta, Nopember 3, 2007.

•  H. Setiawan, T. Adiono , A. Kurniawan, “ Digital Base Band Signal Processing Design for WCDMA Downlink Communication and The Implementation on FPGA ”, International Conference on Instrumentation Communication Communication and Information Technology, FMIPA - ITB Bandung, August 8-9, 2007.

•  H. Setiawan, T. Adiono, A. Kurniawan, " Proses Sinkronisasi Frame pada Komunikasi Downlink WCDMA ", Seminar Nasional Riset Teknologi Informasi 2007, di Yogyakarta 9 Juli 2007, Vol. II 2007, ISSN : 1907-3526.

2006

•  T. Adiono , A.O. Tamaela, N. Sutisna, " Perancangan dan Implementasi Pipeline RISC Processor Core 32-bit SIEGE32 ". Industrial Electronics Seminar 2006, EEPIS-ITS, Surabaya, November 7-9, 2006.

•  T. Adiono, A. Tumewu, " Perancangan dan Implementasi USB 1.1. Function IP Core ". Industrial Electronics Seminar 2006, EEPIS-ITS, Surabaya, November 7-9, 2006.

•  Turyana, T. Adiono, E. Y. Syamsuddin. " Perancangan Arsitektur Context-based adaptive Binary Arithmetic Coding (CABAC) Encoder untuk Kompresi Video H.264/MPEG4-AVC ", Industrial Electronics Seminar 2006, EEPIS-ITS, Surabaya, November 7-9, 2006.

•  T. Adiono, A. Hamidah, T. R. Mengko, " High Performance Tele-Meicine System Design ", BME DAYS 2006, Bandung, Indonesia, November 13 - 15, 2006.

•  H. Setiawan, T. Adiono, " Speed-Up Proses Kuantisasi pada MPEG4-AVC/H-264 ", Seminar Nasional Teknologi Informasi SNTI 2006, Vol.3 No.1 Tahun 2006 ISSN: 1829-9156, 15 November 2006.

•  Sutanto, D. Fitriyanto, T. Adiono , “ Perancangan Deblocking Filter untuk Aplikasi Kompresi Video Menggunakan Standar MPEG4/H.264, ” Konferensi Nasional e-Indonesia Intiative 2006, Bandung, Indonesia, Mei 3-4, 2006.

•  N. Sutisna, A. Mulyanto, T. Adiono , “ RISC Based 32-Bit Core Processor Design for System on Chip (SoC) ,” International Seminar on Electrical Power, Electronics, Communication, Control and Informatics, Malang, Indonesia, Mei 16-17, 2006.

•  M. Tapilouw, T. Adiono , E. Y. Syamsuddin, " Perancangan dan Implementasi Variable Block Size Motion Estimation dari MPEG4/H.264 CoDec ," International Seminar on Electrical Power, Electronics, Communication, Control and Informatics, Malang, Indonesia, Mei 16-17, 2006.

•  T. Adiono , D. Fitriyanto, T. Setiadipura, “ Very Low Bit-Rate Tele-Ophthalmology for Rural Area Application ”, The Fourth Asia Pacific Telecommunications Telemedicine Workshop 2006, January 25-26, 2006.

2005

•  A. Mulyanto , D. Fitriyanto, T. Adiono , T. R. Mengko, E. Y. Syamsuddin, “ 32 Bit RISC Processor for Programmable H.264+/MPEG4-AVC Codec ”, International Conference on Instrumentation, Communication and Information Technology (ICICI) 2005, Bandung, Indonesia August 3-5, 2005,.

•  T. Adiono , D. Fitriyanto, " Pengembangan Industri Design House Rangkaian Terintegrasi (IC) berbasis Lisensi di Indonesia ", Pameran & Seminar SUCP 2005.

•  T. Adiono , B. Wijaya, J. Kurniawan, B. Prasetya, “ Videophone Terminal for IP Network on TMS3206711 Platform ”, International Conference on Instrumentation, Communication and Information Technology (ICICI) 2005, Bandung, Indonesia, August 3-5, 2005.

•  T. Adiono , D. Fitriyanto, A. Mulyanto, S. Wisayataksin, K. Takeichi, D. Li, T. L. R. Mengko, H. Kunieda, " New Macroblock Engine Architecture For Video Processing ", MVA2005, Japan, May 16-18, 2005.

•  T. Adiono , D. Fitriyanto, A. Mulyanto, " Low Bit-Rate H.263+/MPEG4 Based Videophone Design for empowering Communication Infrastructure " , National Conference on Information and Communication Technology (ICT) for Indonesia, Bandung, Indonesia, April 19-20, 2005.

•  T. Adiono , D. Fitriyanto, A. Mulyanto, T. R. Mengko, E. Y. Syamsuddin, " H.263+/MPEG 4 Video Phone VLSI Design for Low Bit-Rate Application " , National Conference on Information and Communication Technology (ICT) for Indonesia, Bandung, Indonesia, April 19-20, 2005.

•  Mulyanto, D. Fitriyanto, M. Amien S., T. Adiono , T. R. Mengko, E. Y. Syamsuddin, " Microprocessor Design For H.263+/MPEG4 Codec " , National Conference on Information and Communication Technology (ICT) for Indonesia, Bandung, April 19-20, 2005.

2004

•  M. Syafrudin, A. Mulyanto, T. Adiono , H. Kunieda, " Prototyping I2C Bus-base Interface Technology between Video Codec System and HMP8117 " , IECI Japan Workshop, 2004,pp.49-53, ISSN 1344 7491.

2002

•  T. Adiono , T. Isshiki, D. Li, H. Kunieda . " Efficient Method for Face Region Quality Enhancement in Low Bit Rate Video Coding ". Proceedings of 2002 IEEE Asia Pasific Conference on Circuit and System, <I>, ISBN 0-7803-7690-0, Pages 549 - 553, (2002).

•  T. Adiono , T. Isshiki, D. Li , H. Kunieda , “ A New Methodology for Low Delay Real-time Videophone Software Architecture Design ”. 2002 IEEE Asia Pacific Conference on Circuit and System, <II>, ISBN 0-7803-7690-0, 269 -273, (2002).

2001

•  T. Isshiki, C. Honsawek, T. Adiono , K. Ito, T. Ohtsuka, D. Li, H. Kunieda , “ H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method ” . ISAS-SCI Proceedings of the World Multiconference on Systematics, Cybernetics and Informatics: Information Systems Development-Volume I, 2001, ISBN 980-07-7541-2, Pages 195-200.

2000

•  T. Adiono , T. Isshiki, K. Ito, T. Ohtsuka, D. Li, C. Honsawek, H. Kunieda., " Face Focus Coding Under H.263+ Video Coding Standard, " IEEE APCCAS, No.00EX394, pp.461-464, China, Dec.4-6, 2000.

•  T. Adiono ," Analysis of ITU-T H.263+ Video Coding Performance in Application to PSTN Network, " The 9 th Scientific Meeting Temu Ilmiah TI-IX PPI 2000, Japan.

•  Honsawek, K. Ito, T. Ohtsuka, T. Isshiki, D. Li, T. Adiono , H. Kunieda, " System-MSPA Design of H.263+ Video Encoder LSI for Face Focused Videotelephony ," IEEE APCCAS, No.00EX394, Pages 152-155, China, December 4-6, 2000.

1999

•  Li, T. Adiono , C. Honsawek, and H. Kunieda, " Multimedia LSI Design Based on Window-MSPA Architecture ," ISPACS'99 Thailand, Pucket, Dec.8-10, 1999 (Invited Paper).

1998

•  T. Mengko, T. Adiono, Handoko S., Rini S., Donny, " Design and Implementation of Real-Time System for Object Detection and Classification on Parallel Virtual Machine ," IAPR Workshop on MVA 98, Makuhari, Chiba, Japan, Nov. 17-19, 1998.

•  T. Mengko, T. Adiono , Handoko S., Rini S., " Design and Implementation of Object Detection and Classification System Based on Deformable Template Algorithm ," 1998 IEEE Asia Pacific Conference on Circuit and Systems, Microelectronics and Integrated Systems, Chiangmai, Thailand, November 1998.

1997

•  S. Suryadarma, T. Adiono , C. Machbub, T.L. R. Mengko " Camera Object Tracking System ", ICICS, Singapore, 1997. Proceedings (ISBN): 0-7803-3676-3.

1996

•  Y. Suryanto, Y. M. Ariani and T. Adiono , " Fast Image Processor Design Using Five Parallel DSP " , International Conference on Microelectronics, Bandung, Indonesia, 1996.

•  T. Adiono , Y. Yanuhardi., T. Mengko, " Design and Implementation of Configurable Binary Template Matching Processor for Morphological and Template Matching Operations ," ICME'96, Bandung, Indonesia, January 1996.

•  Y. Yanuhardi, T. Adiono , T. Mengko, " TMP5X5T1M : A Configurable Binary Morphological and Template Matching Processor ," Machine Vision Application 96, Tokyo, Japan, November 1996.

1995

•  T. Adiono , Rafdian, Indradjit, T. Mengko, " Binary Template Matching Solution to Path Planning Problem ," ACCV'95, Singapore, December 1995.

•  Rafdian, T. Adiono , Indradjit, T. Mengko, " Fast Skeleton Operation Using Template Matching Algorithm ," ACCV'95, Singapore, December 1995.

1994

•  T. Adiono , Y. Yanuhardi, S. Suroko , T. Mengko, " The Design and Implementation of Binary Template Matching Processor ," International Conference on Microelectronics, Istambul, Turki, September 1994.

 

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