{"id":23133,"date":"2024-12-15T01:53:07","date_gmt":"2024-12-14T18:53:07","guid":{"rendered":"https:\/\/stei.itb.ac.id\/?page_id=23133"},"modified":"2024-12-16T08:14:55","modified_gmt":"2024-12-16T01:14:55","slug":"pengembangan-konten-pembelajaran-fpga-berbasis-project-based-learning","status":"publish","type":"page","link":"https:\/\/stei.itb.ac.id\/en\/prima\/pengembangan-konten-pembelajaran-fpga-berbasis-project-based-learning\/","title":{"rendered":"Pengembangan Konten Pembelajaran FPGA berbasis Project-Based Learning"},"content":{"rendered":"<div class=\"wpb-content-wrapper\"><div class=\"fullwidth\" ><div class=\"vc_row wpb_row vc_row-fluid kepala vc_custom_1734236300248 vc_row-has-fill\"><div class=\"wpb_column vc_column_container vc_col-sm-12\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\"><div class=\"container\" ><div class=\"vc_row wpb_row vc_inner vc_row-fluid\"><div class=\"wpb_column vc_column_container vc_col-sm-12\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\"><div class=\"vc_btn3-container vc_btn3-inline vc_do_btn\" ><button class=\"vc_general vc_btn3 vc_btn3-size-lg vc_btn3-shape-rounded vc_btn3-style-modern vc_btn3-icon-left vc_btn3-color-white\" onclick=\"history.back()\"><i class=\"vc_btn3-icon fas fa-home\"><\/i> Kembali ke Beranda<\/button><\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div><div class=\"fullwidth\" ><div class=\"vc_row wpb_row vc_row-fluid vc_custom_1734170418007\"><div class=\"wpb_column vc_column_container vc_col-sm-3\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\">\n\t<div class=\"wpb_text_column wpb_content_element\" >\n\t\t<div class=\"wpb_wrapper\">\n\t\t\t<p><strong>Muhammad Iqbal Arsyad, ST., MT.<\/strong><br \/>\nSTE-ITB<\/p>\n\n\t\t<\/div>\n\t<\/div>\n<\/div><\/div><\/div><div class=\"wpb_column vc_column_container vc_col-sm-3\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\"><\/div><\/div><\/div><div class=\"wpb_column vc_column_container vc_col-sm-3\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\"><\/div><\/div><\/div><div class=\"wpb_column vc_column_container vc_col-sm-3\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\"><\/div><\/div><\/div><\/div><\/div><div class=\"fullwidth\" ><div class=\"vc_row wpb_row vc_row-fluid\"><div class=\"wpb_column vc_column_container vc_col-sm-12\"><div class=\"vc_column-inner\"><div class=\"wpb_wrapper\"><h4 style=\"color: #111111;text-align: left;font-family:Abril Fatface;font-weight:400;font-style:normal\" class=\"vc_custom_heading vc_do_custom_heading\" >Digital Systems Practicum<\/h4>\n\t<div class=\"wpb_text_column wpb_content_element\" >\n\t\t<div class=\"wpb_wrapper\">\n\t\t\t<p><strong>Teknologi Implementasi<\/strong><\/p>\n<ul>\n<li>Logic IC<\/li>\n<li>FPGA<\/li>\n<li>VHDL<\/li>\n<li>Simulasi<\/li>\n<\/ul>\n<p><strong>Rangkaian Kombinasional<\/strong><\/p>\n<ul>\n<li>Perancangan rangkaian kombinasional<\/li>\n<li>Logic Level<\/li>\n<li>Simulasi<\/li>\n<li>Implementasi FPGA<\/li>\n<\/ul>\n<p><strong>Finite State Machine + Datapath<\/strong><\/p>\n<ul>\n<li>Perancangan FSM<\/li>\n<li>RTL<\/li>\n<li>Hierachical Design<\/li>\n<li>Simulasi<\/li>\n<li>Implementasi FPGA<\/li>\n<\/ul>\n<p><strong>Implementasi UART di FPGA board<\/strong><\/p>\n<ul>\n<li>Komunikasi UART antara PC dan FPGA board<\/li>\n<li>ASCII<\/li>\n<li>Simulasi<\/li>\n<li>Implementasi FPGA<\/li>\n<\/ul>\n\n\t\t<\/div>\n\t<\/div>\n<\/div><\/div><\/div><\/div><\/div>\n<\/div>","protected":false},"excerpt":{"rendered":"Kembali ke Beranda Muhammad Iqbal Arsyad, ST., MT. STE-ITB Praktikum Sistem Digital Teknologi Implementasi Logic IC FPGA VHDL Simulasi Rangkaian Kombinasional Perancangan rangkaian kombinasional Logic Level Simulasi Implementasi FPGA Finite [...]","protected":false},"author":1,"featured_media":0,"parent":22933,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-23133","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/pages\/23133","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/comments?post=23133"}],"version-history":[{"count":3,"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/pages\/23133\/revisions"}],"predecessor-version":[{"id":23570,"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/pages\/23133\/revisions\/23570"}],"up":[{"embeddable":true,"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/pages\/22933"}],"wp:attachment":[{"href":"https:\/\/stei.itb.ac.id\/en\/wp-json\/wp\/v2\/media?parent=23133"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}